This invention relates to a semiconductor device and, in particular, to a bipolar junction transistor of an epitaxial planar type and fabrication processing method thereof.
In the manner which will later be described more in detail, a conventional bipolar junction transistor of an epitaxial planar type comprises a collector region of a first conductivity type formed in a semiconductor substrate, a base region of a second conductivity type formed on the collector region, and an emitter region of the first conductivity type formed in the base region. An insulating layer is formed on the base region and the emitter region. The insulating layer has an opening in registry with the emitter region to form an emitter contact hole for a poly-silicon electrode. In the emitter contact hole, a poly-silicon layer is formed to be contact with a top surface of the emitter region. The poly-silicon layer is connected to an aluminum electrode formed on the emitter layer.
In fabrication of the transistor described above, the emitter region is formed after formation of the insulating layer and the poly-silicon layer. An impurity of the first conductivity type is doped in the poly-silicon layer by, for example, the ion implantation method. Thus, the impurity is diffused into the base region from the poly-silicon layer by the thermal diffusion method to form the emitter region of the first conductivity type in the base region.
It should be noted that before forming the poly-silicon in the emitter contact hole, the exposure surface of the base region is exposed to the atmosphere and is partially oxidized naturally. That is, the exposed surface is partially covered with the native oxide.
When the poly-silicon is formed on the base region partially coated with the native oxide, the poly-silicon grains tend to grow on a monocrystal surface of the base region and the native oxide less than 10 angstroms in thickness.
On the other hand, it is noted in the thermal diffusion of impurity from the poly-silicon into the base region that the diffusion speed is larger in the crystal grain boundary than in the crystal grain. This means that the grain growth of the poly-silicon makes the diffusion speed slow, so that the time is extended for the thermal diffusion of the impurities to form the emitter region in the base region. This also results in expansion of the base region which degrades the transistor properties such as the cut-off frequency f(T).